The present invention relates to semiconductor integrated circuit (IC) devices (chips) and, more particularly, to IC chips having an antenna formed thereon.
With increasing dependents on local and wide area wireless networks, particularly those with low power (range) requirements, there is perceived to be a need to have an antenna structure integrated onto single semiconductor devices. One important lack has been an on-chip antenna structure.
The length and material of antennas normally determine the frequency and intensity of signals that maybe received or sent from the antenna. However with smaller and smaller local area wireless networks being contemplated, the concept of a room sized network area or building area with antennas mounted in walls and ceilings (whether independent separate antennas or multi-use antennas, such as using electrical wiring or telephone wiring as an antenna structure), the feasibility of using very low power antenna structures to transfer information from a local network to a wireless IC device or system containing such wireless IC device becomes practicable.
The following documents, all of which are U.S. patents, all of which are incorporated by reference herein, disclose various techniques having some relevance to the present invention.
U.S. Pat. No. 4,724,427 (Feb. 2, 1998) discloses a transponder device. FIG. 9 of the patent, reproduced as FIG. 1 herein, shows a topographical representation of a transponder chip 100 in an embodiment that includes an antenna coil 104 as part of a monolithic chip 102. As disclosed therein, the coil 104 is etched around the periphery of the chip substrate 102. In the center of the coil 104 are found a custom logic circuit 106, a programmable memory array 108, and memory control logic 110. Using the chip topography shown in this figure, a functionally complete transponder may be realized on a single semiconductor chip. (see column 11, lines 7-22; numbers edited)
In a similar manner, U.S. Pat. No. 5,345,231 (September 1994) discloses a contactless inductive data-transmission system. FIG. 7 of the patent shows components of a chip having a substrate 52 which can photolithographically be integrated, including antenna coils 50 which can be in a plane above the semiconductor topography 51 of the chip. (column 7, lines 14-17) Notably, the antenna coils So are disposed around the periphery of the chip, as was the case in U.S. Pat. No. 4,724,427.
Various problems are attendant integrating an antenna on an integrated circuit (IC) chip. In the case of an antenna disposed about the periphery of the chip, as described by the patents discussed hereinabove, the location of the antenna interferes with conventional bond pad layout about the periphery of the chip. Also, the electromagnetic fields within the central area of an antenna laid out about the periphery of a chip can interfere with the operation of circuits located within the antenna.
Unless otherwise noted, or as may be evident from the context of their usage, any terms, abbreviations, acronyms or scientific symbols and notations used herein are to be given their ordinary meaning in the technical discipline to which the invention most nearly pertains. The following terms, abbreviations and acronyms may be used in the description contained herein:
A/D: Analog-to-Digital (converter).
ALU: Arithmetic Logic Unit.
ASIC: Application-Specific Integrated Circuit.
ATM: Asynchronous Transfer Mode
bit: binary digit.
BLP: Board-Level Product.
byte: eight contiguous bits.
C: a programming language.
CAM: Content-Addressable Memory.
CAS: Column Address Strobe.
CCD: Charge-coupled device.
CD: Compact Disc.
CISC: Complex Instruction Set Computer (or Chip).
CMOS: Complementary Metal-Oxide Semiconductor.
CODEC: Encoder/De-Coder. In hardware, a combination of A/D and D/A converters. In software, an algorithm pair.
Core: A functional block intended to be embedded and integrated in broader logic design.
CPU: Central Processing Unit.
D/A: Digital-to-Analog (converter).
DAT: Digital Audio Tape.
DBS: Direct Broadcast Satellite.
DMA: Direct Memory Access.
DRAM: Dynamic Random Access Memory.
DSP: Digital Signal Processing (or Processor).
ECC: Error Correction Code.
EDO: Extended Data Output.
EDRAM: Extended DRAM.
EEPROM: Also E2PROM. An electrically-erasable EPROM.
EPROM: Erasable Programmable Read-Only Memory.
Flash: Also known as Flash ROM. A form of EPROM based upon conventional UV EPROM technology but which is provided with a mechanism for electrically pre-charging selected sections of the capacitive storage array, thereby effectively xe2x80x9cerasingxe2x80x9d all capacitive storage cells to a known state.
FPGA: Field-Programmable Gate Array
G: or (Giga), 1,000,000,000.
Gbyte: Gigabyte(s).
GPIO: General Purpose Input/Output.
HDL: Hardware Description Language.
HDTV: High Definition Television
IC: Integrated Circuit.
I/F: Interface.
I/O: Input/Output.
IEEE: Institute of Electrical and Electronics Engineers
JPEG: Joint Photographic Experts Group
K: (or kilo), 1000.
kernel: a core functionality of an operating (or other software) system.
KHz: KiloHertz (1,000 cycles per second).
LAN: Local Area Network
M: (or mega), 1,000,000
MAC: Media Access Control.
Mask ROM: A form of ROM where the information pattern is xe2x80x9cmaskedxe2x80x9d onto memory at the time of manufacture.
MCM: Multi-Chip Module.
Mb Megabyte
memory: hardware that stores information (data).
MHz: MegaHertz (1,000,000 cycles per second).
MIPS: Million Instructions Per Second
MLT: Multi-Level Technology.
MPEG: Motion Picture Experts Group. Standard for encoding moving images. Also widely used for high quality audio compression.
MPU: Micro Processing Unit.
NVRAM: Non-volatile RAM.
PLL: Phase Locked Loop.
PROM: Programmable Read-Only Memory.
PWM: Pulse Width Modulation.
PLD: Programmable Logic Device.
RAS: Row Address Strobe.
RAM: Random-Access Memory.
RISC: Reduced Instruction Set Computer (or Chip).
ROM: Read-Only Memory.
RTOS: Real Time Operation System
SCM: Single Chip Module
SDRAM: Synchronous DRAM.
SIE: Serial Interface Engine.
SOC: System On a chip
software: Instructions for a computer or CPU.
SRAM: Static Random Access Memory.
TCP/IP: Terminal Control Protocol/internet Protocol.
UART: Universal Asynchronous Receiver/Transmitter.
USB: Universal Serial Bus.
UV EPROM: An EPROM. Data stored therein can be erased by exposure to Ultraviolet (UV) light.
VCR: Video Cassette Recorder.
VHDL: VHSIC (Very High Speed Integrated Circuit) HDL.
WAN: Wide Area Network. Such as the telephone system or the Internet, or a satellite network.
ZISC: Zero Instruction Set Computer (or Chip).
An object of the invention is to provide an improved technique for integrating an antenna on an integrated circuit (IC) chip.
Another object of the invention is to provide techniques for integrating multiple antennas on an integrated circuit (IC) chip.
According to the invention, a layer or multiple layers of connected metal (or other suitable conductive material such as polysilicon) are placed on an integrated circuit (IC) chip so as to form an antenna structure.
One or more antennas may thus be formed on an IC chip.
Such antennas may be in a single plane of metal, or may be in multiple planes of metal connected as by filled vias.
Additionally the on-chip (or on the IC chip) antenna structure maybe connected electrically with an additional antennae such as could be achieved on a substrate material or an attachable package including a heatsink antenna attached to the package.
Additionally as new packaging techniques including ball grid arrays (BGA), particularly micro-ball grid arrays (xcexcBGA) on the IC chip instead of bond pads, allow greater opportunities for interconnection on an IC chip, larger antenna structures may be integrated onto an IC chip without extensive routing problems as would have occurred with exclusively periphery leads.
Various shapes and forms of antennas are disclosed herein, including peripheral wraps square-shaped spirals loop-spirals and s-curve or z-curve structures.
The use of multiple antennas allows for separate transmitting and receiving antennas, as well as two antennas cooperating with one another to form either a wave guide arrangement (shaped propagation) or various forms of shielding to block signals from the antenna permitting directional or specific narrow frequency bandwidth passing to the antenna on the die.
Additionally, capacitors and inductors may be integrated on the IC chip along with the antenna(s).
The invention has utility in communication applications such as pagers, cordless telephones, analog and digital cellular telephones and personal communication systems.
An integrated circuit (IC) employing the techniques of the present invention may be included in a system or subsystem having electrical functionality. Exemplary systems and subsystems that would benefit from the techniques disclosed herein may include general purpose computers and processors; communications and telecommunications devices (e.g., phones, faxes, etc.); networks; consumer devices; audio and visual (video) receiving, recording and display devices; transportation systems (e.g., vehicles); electromechanical devices, smart cards, etc.
Other objects, features and advantages of the invention will become apparent in light of the following description thereof.
Reference will be made in detail to preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. The drawings are intended to be illustrative, not limiting. Although the invention will be described in the context of these preferred embodiments, it should be understood that it is not intended to limit the spirit and scope of the invention to these particular embodiments.
Certain elements in selected ones of the drawings may be illustrated not-to-scale, for illustrative clarity.
Often, similar elements throughout the drawings may be referred to by similar references numerals. For example, the element 199 in a figure (or embodiment) may be similar in many respects to the element 299 in an other figure (or embodiment). Such a relationship, if any, between similar elements in different figures or embodiments will become apparent throughout the specification, including, if applicable, in the claims and abstract.
In some cases, similar elements may be referred to with similar numbers in a single drawing. For example, a plurality of elements 199 may be referred to as 199a, 199b, 199c, etc.
The cross-sectional views, if any, presented herein may be in the form of xe2x80x9cslicesxe2x80x9d, or xe2x80x9cnear-sightedxe2x80x9d cross-sectional views, omitting certain background lines which would otherwise be visible in a true cross-sectional view, for illustrative clarity.